2 MEG x 16 PAGE FLASH
128K x 16 SRAM COMBO MEMORY
READ CYCLE 1
(S_CE1# = S_OE# = VIL; S_CE2, S_WE# = VIH)
tRC
ADDRESS
DATA-OUT
tOH
PREVIOUS
DATA VALID
tAA
DATA VALID
ADDRESS
S_CE1#
S_CE2
S_OE#
S_LB#, S_UB#
DATA-OUT
READ CYCLE 2
(S_WE# = VIH)
tRC
tAA
tCO
tLZ(2)
tOE
tOLZ
tLB, tUB
tHZ (1, 2)
tOHZ (1)
tLBLZ, tUBLZ
High-Z
tLBHZ, tUBHZ
DATA VALID
READ TIMING PARAMETERS
SYMBOL
tRC
tAA
tCO
tOE
tLB, tUB
tLZ
-10/-11
VCC = 1.65V–1.95V VCC = 1.80V–2.20V
MIN
MAX
MIN
MAX
100
85
100
85
100
85
35
35
100
85
0
0
UNITS
ns
ns
ns
ns
ns
ns
DON’T CARE
SYMBOL
tOLZ
tHZ
tOHZ
tLBHZ, tUBHZ
tOH
-10/-11
VCC = 1.65V–1.95V VCC = 1.80V–2.20V
MIN
MAX
MIN
MAX
0
0
0
15
0
15
0
15
0
15
0
15
0
15
5
5
UNITS
ns
ns
ns
ns
ns
2 Meg x 16 Page Flash 128K x 16 SRAM Combo Memory
MT28C3212P2FL_2.p65 – Rev. 2, Pub. 4/02
43
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©2002, Micron Technology, Inc.