MT28F200B5VG-6T View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT28F200B5VG-6T' PDF : 31 Pages View PDF
2Mb
,,, ,,,,,,,,,,,,, VIH
A0-A16/(A17)
VIL
, , VIH
SMART 5 BOOT BLOCK FLASH MEMORY
WRITE/ERASE CYCLE
WE#-CONTROLLED WRITE/ERASE
Note 1
tAS
tAH
AIN
tAS
tAH
CE#
VIL
tCS
tCH
VIH
OE#
VIL
tWP
tWC
tWPH
tWED1/2/3/4
VIH
WE# VIL
tWB
tDH
tDH
DQ0-DQ7/ VIH
DQ0-DQ15 2 VIL
tDS
tRS
CMD
in
tDS
CMD/
Data-in
tRHS
Status
(SR7=0)
Status
(SR7=1)
tRHH
CMD
in
VHH
[Unlock boot block]
VIH
RP# 3 VIL
VIH
WP# 3 VIL
,,,,,,,,,,,,,, , , VPPH1
, , , , VPPLK
VPP
, , VIL
WRITE SETUP or
ERASE SETUP input
,,, TIMING PARAMETERS
[Unlock boot block]
tVPS1
[5V VPP]
tVPH
WRITE or ERASE (block)
address asserted, and
WRITE data or ERASE
CONFIRM issued
WRITE or ERASE
executed, status register
checked for completion
Command for next
operation issued
DON’T CARE
Commercial Temperature (0°C ≤ TA ≤ +70°C)
Extended Temperature (-40°C ≤ TA ≤ +85°C)
SYMBOL
tWC4
tWC5
tWPH4
tWPH5
tWP4
tWP5
tAS
tAH
tDS
tDH
tCS
-6
MIN MAX
70
60
20
20
50
50
50
0
50
0
0
-8/-8 ET
MIN MAX
80
–
30
–
50
–
50
0
50
0
0
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYMBOL
tCH
tVPS1
tRS
tRHS
tWED1
tWED2
tWED3
tWED4
tWB
tVPH
tRHH
-6
MIN MAX
0
200
500
100
6
300
300
600
200
0
0
-8/-8 ET
MIN MAX
0
200
500
100
6
300
300
600
200
0
0
UNITS
ns
ns
ns
ns
µs
ms
ms
ms
ns
ns
ns
NOTE: 1. Address inputs are “Don’t Care” but must be held stable.
2. If BYTE# is LOW, data and command are 8-bit. If BYTE# is HIGH, data is 16-bit and command is 8-bit (MT28F200B5
only).
3. Either RP# at VHH or WP# HIGH unlocks the boot block.
4. Measurements tested under AC Test Condition 1, VCC = 5V ±10%.
5. Measurements tested under AC Test Condition 2, VCC = 5V ±5%.
2Mb Smart 5 Boot Block Flash Memory
F50.p65 – Rev. 1/00
27
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000, Micron Technology, Inc.
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