Operations
BANK/ROW ACTIVATION
Before any READ or WRITE commands can be is-
sued to a bank within the DDR SDRAM, a row in that
bank must be “opened.” This is accomplished via the
ACTIVE command, which selects both the bank and
the row to be activated, as shown in Figure 4.
After a row is opened with an ACTIVE command, a
READ or WRITE command may be issued to that row,
subject to the tRCD specification. tRCD (MIN) should
be divided by the clock period and rounded up to the
next whole number to determine the earliest clock edge
after the ACTIVE command on which a READ or WRITE
command can be entered. For example, a tRCD specifi-
cation of 20ns with a 125 MHz clock (8ns period) results
in 2.5 clocks rounded to 3. This is reflected in Figure 5,
which covers any case where 2 < tRCD (MIN)/tCK ≤ 3.
(Figure 5 also shows the same case for tRCD; the same
procedure is used to convert other specification limits
from time units to clock cycles).
A subsequent ACTIVE command to a different row
in the same bank can only be issued after the previous
active row has been “closed” (precharged). The mini-
mum time interval between successive ACTIVE com-
mands to the same bank is defined by tRC.
A subsequent ACTIVE command to another bank
can be issued while the first bank is being accessed,
which results in a reduction of total row-access over-
head. The minimum time interval between successive
ACTIVE commands to different banks is defined by
tRRD.
64Mb: x32
DDR SDRAM
CK#
CK
CKE HIGH
CS#
RAS#
CAS#
WE#
A0-A10
RA
BA0,1
BA
RA = Row Address
BA = Bank Address
Figure 4
Activating a Specific Row in
a Specific Bank
T0
T1
T2
T3
T4
T5
T6
T7
CK#
CK
COMMAND
ACT
NOP
NOP
ACT
NOP
NOP
RD/WR
NOP
A0-A10
Row
Row
Col
BA0, BA1
Bank x
Bank y
Bank y
tRRD
tRCD
DON’T CARE
Figure 5
Example: Meeting tRCD (tRRD) MIN When 2 < tRCD (tRRD) MIN/tCK < 3
64Mb: x32 DDR SDRAM
2M32DDR-07.p65 – Rev. 12/01
14
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc.