T0
CK#
CK
64Mb: x32
DDR SDRAM
T1
T2 T2n T3 T3n T4 T4n T5 T5n
COMMAND
READ
NOP
READ
NOP
NOP
NOP
ADDRESS
Bank,
Col n
DQS
DQ
CK#
CK
COMMAND
T0
READ
CL = 2
T1
NOP
Bank,
Col b
DO
n
T2
DO
b
T3 T3n T4 T4n T5 T5n
READ
NOP
NOP
NOP
ADDRESS
Bank,
Col n
DQS
CL = 3
Bank,
Col b
DQ
DO
DO
n
b
DON’T CARE
TRANSITIONING DATA
NOTE: 1. DO n (or b) = data-out from column n (or column b).
2. Burst length = 4 or 8 (if 4, the bursts are concatenated; if 8, the second burst interrupts the first).
3. Three subsequent elements of data-out appear in the programmed order following DO n.
4. Three (or seven) subsequent elements of data-out appear in the programmed order following DO b.
5. Shown with nominal tAC, tDQSCK, and tDQSQ.
6. Example applies only when READ commands are issued to same device.
Figure 8
Consecutive READ Bursts
64Mb: x32 DDR SDRAM
2M32DDR-07.p65 – Rev. 12/01
17
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc.