CK#
CK
COMMAND
T0
READ
ADVANCE
128Mb: x32
DDR SDRAM
Figure 7
READ Burst
T1
T2 T2n T3 T3n T4
T5
NOP
NOP
NOP
NOP
NOP
ADDRESS
Bank a,
Col n
DQS
CL = 2
DQ
DO
n
T0
T1
T2
T3 T3n T4
T5
CK#
CK
COMMAND
READ
NOP
NOP
NOP
NOP
NOP
ADDRESS
Bank a,
Col n
DQS
CL = 3
DQ
DO
n
DON T CARE
TRANSITIONING DATA
NOTE: 1. DO n = data-out from column n.
2. Burst length = 4.
3. Three subsequent elements of data-out appear in the programmed order following DO n.
4. Shown with nominal tAC, tDQSCK, and tDQSQ.
128Mb: x32 DDR SDRAM
4M32DDR_B.p65 – Rev. B, Pub. 7/02
16
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©2002, Micron Technology, Inc.