MT46V4M32 View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT46V4M32' PDF : 66 Pages View PDF
CK#
CK
COMMAND
T0
READ
Figure 9
Nonconsecutive READ Bursts
T1
T2 T2n T3 T3n T4
ADVANCE
128Mb: x32
DDR SDRAM
T5 T5n T6
NOP
NOP
READ
NOP
NOP
NOP
ADDRESS
Bank,
Col n
DQS
DQ
CK#
CK
COMMAND
T0
READ
CL = 2
T1
NOP
Bank,
Col b
DO
n
T2
T3 T3n T4
NOP
READ
NOP
DO
b
T5 T5n T6
NOP
NOP
ADDRESS
Bank,
Col n
DQS
CL = 3
Bank,
Col b
DQ
DO
DO
n
b
DON T CARE
TRANSITIONING DATA
NOTE: 1. DO n (or b) = data-out from column n (or column b).
2. Burst length = 4 or 8 (if 4, the bursts are concatenated; if 8, the second burst interrupts the first).
3. Three subsequent elements of data-out appear in the programmed order following DO n.
4. Three (or seven) subsequent elements of data-out appear in the programmed order following DO b.
5. Shown with nominal tAC, tDQSCK, and tDQSQ.
6. Example applies when READ commands are issued to different devices or nonconsecutive READs.
128Mb: x32 DDR SDRAM
4M32DDR_B.p65 – Rev. B, Pub. 7/02
18
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.
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