MT48H8M32LFBF-75L View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48H8M32LFBF-75L' PDF : 71 Pages View PDF
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
Operations
Figure 28: Clock Suspend During READ Burst
T0
T1
T2
T3
T4
T5
T6
CLK
CKE
INTERNAL
CLOCK
COMMAND
READ
NOP
NOP
NOP
NOP
NOP
ADDRESS
BANK,
COL n
DQ
DOUT
n
DOUT
n+1
DOUT
n+2
DOUT
n+3
DON’T CARE
Note: For this example, CL = 2, BL = 4 or greater, and DQM is LOW.
Figure 29: READ with Auto Precharge Interrupted by a READ
T0
T1
T2
T3
T4
T5
T6
T7
CLK
COMMAND
NOP
READ - AP
BANK n
NOP
READ - AP
BANK m
NOP
NOP
BANK n
Internal
States
BANK m
Page Active
READ with Burst of 4
Page Active
Interrupt Burst, Precharge
t RP - BANK n
READ with Burst of 4
NOP
NOP
Idle
tRP - BANK m
Precharge
ADDRESS
DQ
BANK n,
COL a
BANK m,
COL d
CL = 3 (bank n)
DOUT
a
DOUT
a+1
CL = 3 (bank m)
DOUT
d
DOUT
d+1
DON’T CARE
Note: DQM is LOW.
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
MT48H16M16LF_2.fm - Rev F 4/07 EN
37
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