MT48H8M32LFBF-75L View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48H8M32LFBF-75L' PDF : 71 Pages View PDF
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
Truth Tables
Truth Tables
Table 6:
Truth Table – CKE
Notes: 1–4
CKEn-1
L
L
H
H
CKEn
L
H
L
H
Current State
Power-down
Self refresh
Clock suspend
Deep power-down
Power-down
Deep power-down
Self refresh
Clock suspend
All banks idle
All banks idle
All banks idle
Reading or writing
Commandn
X
X
X
X
COMMAND INHIBIT or NOP
X
COMMAND INHIBIT or NOP
X
COMMAND INHIBIT or NOP
BURST TERMINATE
AUTO REFRESH
VALID
See Table 8 on page 43
Actionn
Maintain power-down
Maintain self refresh
Maintain clock suspend
Maintain deep power-down
Exit power-down
Exit deep power-down
Exit self refresh
Exit clock suspend
Power-down entry
Deep power-down entry
Self refresh entry
Clock suspend entry
Notes
8
5
8
6
7
8
Notes:
1. CKEn is the logic state of CKE at clock edge n; CKEn-1 was the state of CKE at the previous
clock edge.
2. Current state is the state of the SDRAM immediately prior to clock edge n.
3. COMMANDn is the command registered at clock edge n, and ACTIONn is a result of COM-
MANDn.
4. All states and sequences not shown are illegal or reserved.
5. Exiting power-down at clock edge n will put the device in the all banks idle state in time for
clock edge n + 1 (provided that tCKS is met).
6. Exiting self refresh at clock edge n will put the device in the all banks idle state once tXSR is
met. COMMAND INHIBIT or NOP commands should be issued on any clock edges occurring
during the tXSR period. A minimum of two NOP commands must be provided during tXSR
period.
7. After exiting clock suspend at clock edge n, the device will resume operation and recognize
the next command at clock edge n + 1.
8. Deep power-down is power savings feature of this Mobile SDRAM device. This command is
BURST TERMINATE when CKE is HIGH and deep power-down when CKE is LOW.
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
MT48H16M16LF_2.fm - Rev F 4/07 EN
40
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