Figure 36: Auto-Refresh Mode
T0
T1
CLK
tCK
CKE
tCKS
tCKH
tCMS tCMH
COMMAND
PRECHARGE
NOP
DQM /
DQML, DQMH
A0–A9,
A11, A12
A10
ALL BANKS
SINGLE BANK
tAS tAH
BA0, BA1
BANK(S)
DQ High-Z
tRP
Precharge all
active banks
512Mb: x4, x8, x16 SDRAM
Timing Diagrams
T2
((
))
tCH
((
))
((
))
Tn + 1
tCL
To + 1
((
))
((
))
((
))
AUTO
REFRESH
((
))
NOP( ( NOP
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
tRFC
AUTO
REFRESH
((
))
NOP( ( NOP
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
tRFC
ACTIVE
ROW
ROW
BANK
Don’t Care
PDF: 09005aef809bf8f3/Source: 09005aef80818a4a
512MbSDRAM.fm - Rev. L 10/07 EN
52
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