MX919B View Datasheet(PDF) - MX-COM Inc
Part Name
Description
MFG CO.
'MX919B' PDF : 48 Pages View PDF
4-Level FSK Modem Data Pump
Page 31 of 47
MX919B PRELIMINARY INFORMATION
START
Ensure that the Control Register
has been loaded with
a suitable CKDIV value
Set µC variable 'IBLOCKS'
to the number of Intermediate blocks
to be transmitted
Ensure that the Mode Register
IRQEN, PSAVE and RXEYE bits are '0',
the TX/RX bit is '1',
and the INVSYM bit is set appropriately
Write a RESET task to the Command Register
Read the Status Register
Yes
BFREE bit = 1 ?
No
Set µC variable 'STATE' to 0
Set the Mode Register IRQEN bit to '1'
Enable µC's MX919B Tx Interrupt Service Routine
Write 6 bytes of Symbol Sync
pattern to the Data Buffer
Write a T24S task to the Command Register
Note: during this time the µC may
perform other functions, as the
µC variable 'STATE' is updated
by the interrupt service routine
Yes
'STATE' < 5 ?
No
Disable µC's MX919B Tx Interrupt Service Routine
Set the Mode Register IRQEN bit to '0'
END
with error
No
'STATE' = 5 ?
Yes
END
Figure 19: Transmit Frame Example Flowchart, Main Program
Notes
1. The RESET command in Figure 19 and the practice of disabling the MX919B’s IRQ output when not
needed are not essential but can eliminate problems during debugging and if errors occur in operation
2. The CRC and TXIMP bits should be set appropriately every time a byte is written to the Command
Register.
©2001 MX•COM, INC.
www.mxcom.com Tele: 800 638 5577 336 744 5050 Fax: 336 744 5054
Doc. # 20480170.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.
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