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N25Q128A23ESF40F View Datasheet(PDF) - Numonyx -> Micron

Part Name
Description
MFG CO.
'N25Q128A23ESF40F' PDF : 180 Pages View PDF
Volatile and Non Volatile Registers
N25Q128 - 3 V
Table 3. Non-Volatile Configuration Register
Bit
Parameter Value
Description
0000
As '1111'
0001
1
0010
2
0011
3
0100
4
0101
5
0110
6
0111
7
1000
8
NVCR<15:12>
Dummy clock
cycle
1001
9
1010
10
1011
11
1100
12
1101
13
1110
14
1111
Target on maximum
allowed frequency fc
(108MHz) and to
guarantee backward
compatibility (default)
000
XIP for SIO Read
001
XIP for DOFR
010
XIP for DIOFR
NVCR<11:9>
XIP enabling 011
at POR
100
101
XIP for QOFR
XIP for QIOFR
reserved
110
reserved
111
XIP disabled (default)
000
reserved
NVCR<8:6>
001
010
Output Driver
Strength
011
100
90
60
45
reserved
101
20
110
15
Note
To optimize instruction execution
(FASTREAD, DOFR,DIOFR,QOFR,
QIOFR, ROTP) according to the frequency
Impedance at Vcc/2
36/180
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