PC8533-2 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
'PC8533-2' PDF : 45 Pages View PDF
NXP Semiconductors
PCF8533
Universal LCD driver for low multiplex rates
Table 17. Dynamic characteristics …continued
VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = −40 °C to +85 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min Typ Max Unit
Pins SCL and SDA
tBUF
tSU;STO
tHD;STA
tSU;STA
tr
tf
Cb
tw(spike)
bus free time between a STOP and START condition
set-up time for STOP condition
hold time (repeated) START condition
set-up time for a repeated START condition
rise time of both SDA and SCL signals
fall time of both SDA and SCL signals
capacitive load for each bus line
spike pulse width
on bus
1.3 -
0.6
-
0.6
-
0.6
-
-
-
-
-
-
-
-
-
-
μs
-
μs
-
μs
-
μs
0.3 μs
0.3 μs
400 pF
50
ns
[1] Typical output duty cycle of 50 %.
[2] All timing values are valid within the operating supply voltage and ambient temperature range and are referenced to VIL and VIH with an
input voltage swing of VSS to VDD.
[3] The corresponding frame frequency is ffr = fclk ⁄ 24 .
CLK
tclk(H)
1 / fCLK
tclk(L)
SYNC
tPD(SYNC_N)
tSYNC_NL
BP0 to BP3,
and S0 to S79
tPD(drv)
Fig 20. Driver timing waveforms
0.7 VDD
0.3 VDD
0.7 VDD
0.3 VDD
0.5 V
(VDD = 5 V)
0.5 V
001aag591
PCF8533_4
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 04 — 5 March 2010
© NXP B.V. 2010. All rights reserved.
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