PCF2127 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
'PCF2127' PDF : 101 Pages View PDF
NXP Semiconductors
PCF2127
Accurate RTC with integrated quartz crystal for industrial applications
8.11.2 Register Watchdg_tim_val
Table 56. Watchdg_tim_val - watchdog timer value register (address 11h) bit allocation
Bits labeled as X are undefined at power-on and unchanged by subsequent resets.
Bit
7
6
5
4
3
2
1
0
Symbol
WATCHDG_TIM_VAL[7:0]
Reset
value
X
X
X
X
X
X
X
X
Table 57. Watchdg_tim_val - watchdog timer value register (address 11h) bit description
Bits labeled as X are undefined at power-on and unchanged by subsequent resets.
Bit
Symbol
Value
Description
7 to 0
WATCHDG_TIM_
VAL[7:0]
00 to FF
timer period in seconds:
TimerPeriod = -------------------------------n-------------------------------
SourceClockFrequency
where n is the timer value
Table 58. Programmable watchdog timer
TF[1:0] Timer source
Units Minimum timer
clock frequency
period (n = 1)
00
4.096
kHz 244
01
64
Hz
15.625
10
1
Hz
1
11
1⁄60
Hz
60
Units
s
ms
s
s
Maximum timer
period (n = 255)
62.256
3.984
255
15 300
Units
ms
s
s
s
8.11.3 Watchdog timer function
The watchdog timer function is enabled or disabled by the WD_CD[1:0] bits of the register
Watchdg_tim_ctl (see Table 55).
The two bits TF[1:0] in register Watchdg_tim_ctl determine one of the four source clock
frequencies for the watchdog timer: 4.096 kHz, 64 Hz, 1 Hz, or 1⁄60 Hz (see Table 58).
When the watchdog timer function is enabled, the 8-bit timer in register Watchdg_tim_val
determines the watchdog timer period (see Table 58).
The watchdog timer counts down from the software programmed 8-bit binary value n in
register Watchdg_tim_val. When the counter reaches 1, the watchdog timer flag WDTF
(register Control_2) is set logic 1.
If WDTF is logic 1 and:
• if WD_CD[1:0] = 10 an interrupt will be generated
• if WD_CD[1:0] = 11 a reset will be generated
The counter does not automatically reload.
PCF2127
Product data sheet
When WD_CD[1:0] = 10 or WD_CD[1:0] = 11 and the Microcontroller Unit (MCU) loads a
watchdog timer value n:
• the flag WDTF is reset
• INT or RST is cleared
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 19 December 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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