NXP Semiconductors
PCF2127
Accurate RTC with integrated quartz crystal for industrial applications
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Q
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Counter reached 1, WDTF is set logic 1, reset pulse on the RST pin is generated for a time equal
to tw(rst).
Fig 24. WD_CD[1:0] = 11: watchdog activates a reset pulse when timed out
Table 59. Specification of tw(rst)
WD_CD[1:0]
TF[1:0]
11
00
01
10
11
tw(rst)
244 s
15.625 ms
15.625 ms
15.625 ms
8.11.4 Countdown timer function
The countdown timer function is controlled by the WD_CD[1:0] bits in register
Watchdg_tim_ctl (see Table 55).
The timer counts down from the software programmed 8-bit binary value n in register
Watchdg_tim_val. When the counter reaches 1
• the countdown timer flag CDTF is set
• the counter automatically reloads
• and the next time period starts
Loading the counter with 0 effectively stops the timer.
Reading the timer returns the actual value of the countdown counter.
PCF2127
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 19 December 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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