PCF2129T View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
'PCF2129T' PDF : 73 Pages View PDF
NXP Semiconductors
PCF2129T
Accurate RTC with integrated quartz crystal for industrial
8.7 Reset function
The PCF2129T has a Power-On Reset (POR) and a Power-On Reset Override (PORO)
function implemented.
8.7.1 Power-On Reset (POR)
The POR is active whenever the oscillator is stopped. The oscillator is also considered to
be stopped during the time between power-on and stable crystal resonance (see
Figure 10). This time may be in the range of 200 ms to 2 s depending on temperature and
supply voltage. Whenever an internal reset occurs, the oscillator stop flag is set (OSF set
logic 1).
chip in reset
VDD
chip not in reset
oscillation
internal
reset
Fig 10. Dependency between POR and oscillator
t
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After POR, the following mode is entered:
• 32.768 kHz CLKOUT active
• Power-On Reset Override (PORO) available to be set
• 24 hour mode is selected
• Battery switch-over is enabled
• Battery low detection is enabled
The register values after power-on are shown in Table 5.
8.7.2 Power-On Reset Override (PORO)
The POR duration is directly related to the crystal oscillator start-up time. Due to the long
start-up times experienced by these types of circuits, a mechanism has been built in to
disable the POR and therefore speed up the on-board test of the device.
SCL
SDA/CE
osc stopped
OSCILLATOR
0 = stopped, 1 = running
RESET
OVERRIDE
CLEAR
0 = override inactive
1 = override active
0 = clear override mode
POR_OVRD 1 = override possible
Fig 11. Power-On Reset (POR) system
reset
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PCF2129T
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 12 February 2013
© NXP B.V. 2013. All rights reserved.
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