PCF8833 View Datasheet(PDF) - Philips Electronics
Part Name
Description
MFG CO.
'PCF8833' PDF : 112 Pages View PDF
Philips Semiconductors
STN RGB - 132 × 132 × 3 driver
Objective speciï¬cation
PCF8833
6.2.19 COLUMN ADDRESS SET
The display data RAM parameters xs and xe define the column address range of the display data RAM for writing data.
Parameters xs and xe are defined between 0 and 131 (83H), and xs must be smaller then xe.
Table 29 Column address set register bits
D/C
7
6
5
0
0
0
1
1
xs[7]
xs[6]
xs[5]
1
xe[7]
xe[6]
xe[5]
4
0
xs[4]
xe[4]
3
1
xs[3]
xe[3]
2
0
xs[3]
xe[2]
1
1
xs[3]
xe[1]
0
0
xs[0]
xe[0]
DEFAULT
2AH
02H
81H
6.2.20 PAGE ADDRESS SET
The display data RAM parameters ys[7:0] and ye[7:0] define the page (row) address range of the display data RAM for
writing data. Parameters ys and ye are defined between 0 and 131 (83H), and ys must be smaller then ye.
Table 30 Page address set register bits
D/C
7
6
5
0
0
0
1
1
ys[7]
ys[6]
ys[5]
1
ye[7]
ye[6]
ye[5]
4
1
ys[4]
ye[4]
3
1
ys[3]
ye[3]
2
0
ys[3]
ye[2]
1
1
ys[3]
ye[1]
0
1
ys[0]
ye[0]
DEFAULT
2BH
02H
81H
6.2.21 MEMORY WRITE
Data written to the display memory (RAM) is validated by the Memory write (RAMWR) command. Entering this command
always returns the page address and column address to the start addresses xs[7:0] and ys[7:0] respectively. Content of
the display data RAM is written by the data entered following this command, with the page and/or column address
automatically incremented. The data Write mode turned on by this command can be automatically cancelled by entering
another command.
After a power-up the display RAM content is undefined. Neither a hardware reset nor a software reset changes the data
stored in display RAM. Sending display data must stop 160 ns before issuing a hardware reset, otherwise the last word
written to the display RAM may be corrupted.
Table 31 Memory write register bits
D/C
7
6
5
4
3
2
1
0
DEFAULT
0
0
0
1
0
1
1
0
1
2CH
1
D7
D6
D5
D4
D3
D2
D1
D0
XX
2003 Feb 14
27
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