PCF8833 View Datasheet(PDF) - Philips Electronics
Part Name
Description
MFG CO.
'PCF8833' PDF : 112 Pages View PDF
Philips Semiconductors
STN RGB - 132 × 132 × 3 driver
Objective speciï¬cation
PCF8833
The following steps must be followed to enter the Partial
mode:
• Set VOP (when the MMOTP cells are used the VOP for
the Partial mode is predefined)
• Set bias system (when the MMOTP cells are used the
bias system for the Partial mode is predefined)
• Set start address of active area AA1S[7:0]; can be set in
multiples of 4
• Set end address of active area AA1E[7:0] + 1; can be
set in multiples of 4
• Enter Partial mode (PTLON).
When setting the addresses the following conditions must
be ensured:
• (AA1E + 1) − AA1S = 32 (only 1 partial display size
setting is possible)
• AA1 ≥ 0 and AA1E ≤ 131.
Figure 8 shows how to use the Partial mode with Line
Address Order (LAO) set to logic 0. Figure 9 gives an
example of Partial mode with LAO set to logic 1, and
Fig.10 shows the position of the partial area when the start
address of the active area is AA1S ≥ (131 + 1) − 31, i.e.
AA1S ≥ 101 (AA1S must be set in multiples of 4).
Figure 11 shows how the Partial mode can be used.
handbook, full pagewidth
AA1S [7:0] = 4
32
rows
AA1E [7:0] +1 = 36
RAM
partial area
display
0
ROW 0
1
ROW 1
2
ROW 2
3
ROW 3
4
ROW 4
5
ROW 5
6
ROW 6
7
ROW 7
8
ROW 8
9
ROW 9
10
ROW 10 partial area
11
ROW 11
12
ROW 12
13
ROW 13
24
ROW 24
25
ROW 25
26
ROW 26
27
ROW 27
28
ROW 28
29
ROW 29
30
ROW 30
31
ROW 31
32
ROW 32
33
ROW 33
34
ROW 34
35
ROW 35
36
ROW 36
37
ROW 37
38
ROW 38
39
ROW 39
40
ROW 40
41
ROW 41
42
ROW 42
127
ROW 127
128
ROW 128
129
ROW 129
130
ROW 130
131
ROW 131
MGU917
Fig.8 Partial Display mode for LAO = 0.
2003 Feb 14
29
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