PH9025L View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
'PH9025L' PDF : 12 Pages View PDF
NXP Semiconductors
PH9025L
N-channel TrenchMOS logic level FET
120
Pder
(%)
80
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120
Ider
(%)
80
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40
40
0
0
50
100
150
200
Tmb (°C)
Pder = P----t--o--P-t-(--t2-o--5-t-°---C---) × 100 %
Fig 1. Normalized total power dissipation as a
function of mounting base temperature
103
ID
(A)
102
Limit RDSon = VDS / ID
10
1
0
0
50
100
150
200
Tj (°C)
Ider = -I--D----(-I-2-D-5---°--C---) × 100 %
Fig 2. Normalized continuous drain current as a
function of mounting base temperature
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tp = 10 µs
100 µs
1 ms
DC
10 ms
100 ms
10−1
10−1
1
10
102
VDS (V)
Tmb = 25 °C; IDM is single pulse;
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PH9025L_1
Product data sheet
Rev. 01 — 23 August 2007
© NXP B.V. 2007. All rights reserved.
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