PIC10LF320 View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC10LF320' PDF : 210 Pages View PDF
PIC10(L)F320/322
5.10 Determining the Cause of a Reset
Upon any Reset, multiple bits in the STATUS and
PCON registers are updated to indicate the cause of
the Reset. Table 5-3 and Table 5-4 show the Reset
conditions of these registers.
TABLE 5-3: RESET STATUS BITS AND THEIR SIGNIFICANCE
POR
BOR
TO
PD
Condition
0
x
1
1
Power-on Reset
u
0
1
1
Brown-out Reset
u
u
0
u
WDT Reset
u
u
0
0
WDT Wake-up from Sleep
u
u
u
u
MCLR Reset during normal operation
u
u
1
0
MCLR Reset during Sleep
TABLE 5-4: RESET CONDITION FOR SPECIAL REGISTERS
Condition
Program
Counter
STATUS
Register
PCON
Register
Power-on Reset
0000h
0001 1000
---- --0x
MCLR Reset during normal operation
0000h
000u uuuu
---- --uu
MCLR Reset during Sleep
0000h
0001 0uuu
---- --uu
WDT Reset
0000h
0000 uuuu
---- --uu
WDT Wake-up from Sleep
PC + 1
0000 0uuu
---- --uu
Brown-out Reset
Interrupt Wake-up from Sleep
0000h
PC + 1(1)
0001 1uuu
0001 0uuu
---- --u0
---- --uu
Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’.
Note 1: When the wake-up is due to an interrupt and Global Enable bit (GIE) is set, the return address is pushed on
the stack and PC is loaded with the interrupt vector (0004h) after execution of PC + 1.
2011-2015 Microchip Technology Inc.
DS40001585D-page 33
Share Link: 
