PIC12F1840 View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC12F1840' PDF : 410 Pages View PDF
PIC12(L)F1840
REGISTER 12-6: WPUA: WEAK PULL-UP PORTA REGISTER
U-0
—
bit 7
U-0
R/W-1/1
R/W-1/1
R/W-1/1
R/W-1/1
—
WPUA5
WPUA4
WPUA3
WPUA2
R/W-1/1
WPUA1
R/W-1/1
WPUA0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
WPUA<5:0>: Weak Pull-up Register bits
1 = Pull-up enabled
0 = Pull-up disabled
Note 1: Global WPUEN bit of the OPTION_REG register must be cleared for individual pull-ups to be enabled.
2: The weak pull-up device is automatically disabled if the pin is in configured as an output.
TABLE 12-2: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
ANSELA
—
—
—
ANSA4
—
ANSA2 ANSA1 ANSA0
106
APFCON
RXDTSEL SDOSEL SSSEL
---
T1GSEL TXCKSEL P1BSEL CCP1SEL 102
LATA
—
—
LATA5
LATA4
—
LATA2
LATA1
LATA0
106
OPTION_REG WPUEN INTEDG TMR0CS TMR0SE
PSA
PS<2:0>
151
PORTA
—
—
RA5
RA4
RA3
RA2
RA1
RA0
105
TRISA
—
—
TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0
105
WPUA
—
—
WPUA5 WPUA4 WPUA3 WPUA2 WPUA1 WPUA0
107
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTA.
TABLE 12-3: SUMMARY OF CONFIGURATION WORD WITH PORTA
Name Bits Bit -/7
Bit -/6
Bit 13/5
Bit 12/4
Bit 11/3 Bit 10/2
Bit 9/1
Bit 8/0
CONFIG1
Legend:
13:8
—
—
FCMEN
IESO CLKOUTEN
BOREN<1:0>
7:0
CP
MCLRE PWRTE
WDTE<1:0>
FOSC<2:0>
— = unimplemented location, read as ‘0’. Shaded cells are not used by PORTA.
CPD
Register
on Page
34
2011-2012 Microchip Technology Inc.
DS41441C-page 107
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