PIC12F1840 View Datasheet(PDF) - Microchip Technology

Part Name

Description

MFG CO.

PIC12F1840

8-Pin Flash Microcontrollers with XLP Technology

Microchip Technology 

Prev 71 72 73 74 75 76 77 78 79 80 Next

PIC12(L)F1840

REGISTER 8-3: PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2

R/W-0/0

U-0

R/W-0/0

R/W-0/0

R/W-0/0

U-0

U-0

OSFIE

—

C1IE

EEIE

BCL1IE

—

—

bit 7

U-0

—

bit 0

Legend:

R = Readable bit

u = Bit is unchanged

‘1’ = Bit is set

W = Writable bit

x = Bit is unknown

‘0’ = Bit is cleared

U = Unimplemented bit, read as ‘0’

-n/n = Value at POR and BOR/Value at all other Resets

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2-0

OSFIE: Oscillator Fail Interrupt Enable bit

1 = Enables the Oscillator Fail interrupt

0 = Disables the Oscillator Fail interrupt

Unimplemented: Read as ‘0’

C1IE: Comparator C1 Interrupt Enable bit

1 = Enables the Comparator C1 interrupt

0 = Disables the Comparator C1 interrupt

EEIE: EEPROM Write Completion Interrupt Enable bit

1 = Enables the EEPROM Write Completion interrupt

0 = Disables the EEPROM Write Completion interrupt

BCL1IE: MSSP Bus Collision Interrupt Enable bit

1 = Enables the MSSP Bus Collision Interrupt

0 = Disables the MSSP Bus Collision Interrupt

Unimplemented: Read as ‘0’

Note: Bit PEIE of the INTCON register must be

set to enable any peripheral interrupt.

DS41441C-page 76

 2011-2012 Microchip Technology Inc.

Share Link: