PIC14000
4.2.2.4 PIE1 REGISTER
This register contains the individual enable bits for the
Peripheral interrupts including A/D capture event, I2C
serial port, PORTC change and A/D capture timer
overflow, and external push button.
Note: INTCON<6> must be enabled to enable
any interrupt in PIE1.
FIGURE 4-6: PIE1 REGISTER
R/W R
CMIE —
bit7
R R/W R/W R/W
R/W R/W
— PBIE I2CIE RCIE ADCIE OVFIE
bit0
Register:
Address:
POR value:
PIE1 W:
8Ch R:
00h U:
Writable
Readable
Unimplemented,
read as '0'
OVFIE: A/D Counter Overflow Interrupt Enable
1 = Enables A/D counter overflow interrupt
0 = Disables A/D counter overflow interrupt
ADCIE: A/D Capture Interrupt Enable
1 = A/D capture interrupt is enabled
0 = A/D capture interrupt is disabled
RCIE: PORTC Interrupt on change Enable
1 = Enables RCIF interrupt on pins, RC<7:4>
0 = Disables RCIF interrupt
I2CIE: I2C Port Interrupt Enable
1 = Enables I2CIF interrupt
0 = Disables I2CIF interrupt
PBIE: External Pushbutton Interrupt Enable
1 = Enable PBTN (pushbutton) interrupt on OSC1/PBTN.
(Note this interrupt not available in HS mode).
0 = Disable PBTN interrupt on OSC1/PBTN
Unimplemented. Read as ‘0’
Unimplemented. Read as ‘0’
CMIE: Programmable Reference Comparator Interrupt Enable
1 = Enable programmable reference comparator trip
0 = Disable programmable reference comparator trip
DS40122B-page 20
Preliminary
© 1996 Microchip Technology Inc.