PIC14000
FIGURE 5-10: BLOCK DIAGRAM OF PORTD<1:0> PINS
Data
Bus
Write
PORTD
I2CCON<5>
DQ
CK Q
VDD
N
I/O
Pin
Write
TRISD
DQ
CK Q
Read
TRISD
N
VSS
Schmitt Trigger
Input Buffer
Read
PortD
QD
EN
Note: I/O pins have protection diodes to VDD and VSS. These pins do not have a P-channel pull-up.
FIGURE 5-11: PORTD DATA REGISTER
08h
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PORTD
RD7/AN7 RD6/AN6 RD5/AN5 RD4/AN4 RD3/REFB RD2/CMPB RD1/SDAB RD0/SCLB
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
POR value xxh X
X
X
X
X
X
X
X
Bit
Name
Function
B7
RD7/AN7
B6
RD6/AN6
B5
RD5/AN5
B4
RD4/AN4
B3
RD3/REFB
B2
RD2/CMPB
B1
RD1/SDAB
B0
RD0/SCLB
GPIO or analog input. Returns value on pin RD7/AN7 when used as a digital
input. When configured as an analog input, reads as ‘0’.
GPIO or analog input. Returns value on pin RD6/AN6 when used as a digital
input. When configured as an analog input, reads as ‘0’.
GPIO or analog input. This pin can connect to a level shift network. If
enabled, a +0.5V offset is added to the input voltage. When configured as
an analog input, reads as ‘0’.
GPIO or analog input. Returns value on pin RD4/AN4 when used as a digital
input. When configured as an analog input, reads as ‘0’.
This pin can serve as a GPIO, or programmable reference B output.
This pin can serve as a GPIO, or comparator B output.
Alternate synchronous serial data I/O for I2C interface enabled by setting
the I2CSEL bit in the MISC register. This pin can also serve as a general
purpose I/O. This pin has an N-channel pull-up to VDD which is disabled in
I2C mode.
Alternate synchronous serial clock for I2C interface, enabled by setting the
I2CSEL bit in the MISC register. This pin can also serve as a general pur-
pose I/O. This pin has an N-Channel pull-up to VDD which is disabled in I2C
mode.
Legend: U = unimplemented, read as ‘0’, x = unknown.
© 1996 Microchip Technology Inc.
Preliminary
DS40122B-page 33