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PIC14000T-04/SS View Datasheet(PDF) - Microchip Technology

Part Name
Description
MFG CO.
PIC14000T-04/SS
Microchip
Microchip Technology Microchip
'PIC14000T-04/SS' PDF : 153 Pages View PDF
PIC14000
6.1 Timer0 Interrupt
The TMR0 interrupt is generated when the Timer0
overflows from FFh to 00h. This overflow sets the T0IF
bit. The interrupt can be masked by clearing bit T0IE
(INTCON<5>). Flag bit T0IF (INTCON<2>) must be
cleared in software by the TMR0 module interrupt ser-
vice routine before re-enabling this interrupt. The
Timer0 module interrupt cannot wake the processor
from SLEEP since the timer is shut off during SLEEP.
The timing of the Timer0 interrupt is shown in
Figure 6-4.
FIGURE 6-2: TIMER0 TIMING: INTERNAL CLOCK/NO PRESCALE
PC
(Program
Counter)
Instruction
Fetch
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
PC-1
PC
PC+1
PC+2
PC+3
PC+4
PC+5
MOVWF TMR0 MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W
PC+6
TMR0
T0
Instruction
Executed
T0+1
T0+2
NT0
NT0
NT0
NT0+1
NT0+2
Write TMR0
executed
Read TMR0
reads NT0
Read TMR0
reads NT0
Read TMR0
reads NT0
Read TMR0
Read TMR0
reads NT0 + 1 reads NT0 + 2
FIGURE 6-3: TIMER0 TIMING: INTERNAL CLOCK/PRESCALE 1:2
PC
(Program
Counter)
Instruction
Fetch
TMR0
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
PC-1
PC
PC+1
PC+2
PC+3
PC+4
PC+5
MOVWF TMR0 MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W
PC+6
T0
T0+1
NT0
NT0+1
Instruction
Execute
Write TMR0
executed
Read TMR0
reads NT0
Read TMR0
reads NT0
Read TMR0
reads NT0
Read TMR0
reads NT0
Read TMR0
reads NT0 + 1
FIGURE 6-4: TIMER0 INTERRUPT TIMING
OSC1
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
CLKOUT(3)
TMR0 timer
FEh
FFh
00h
01h
02h
1
1
T0IF bit
(INTCON<2>)
GIE bit
(INTCON<7>)
INSTRUCTION FLOW
PC
PC
Instruction
fetched
Inst (PC)
Instruction
executed
Inst (PC-1)
PC +1
Inst (PC+1)
Inst (PC)
PC +1
Dummy cycle
0004h
Inst (0004h)
Dummy cycle
0005h
Inst (0005h)
Inst (0004h)
Note 1: T0IF interrupt flag is sampled here (every Q1).
2: Interrupt latency = 4Tcy where Tcy = instruction cycle time.
3: CLKOUT is available only in HS oscillator mode.
DS40122B-page 38
Preliminary
© 1996 Microchip Technology Inc.
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