PIC18F010/020
TABLE 4-1: REGISTER FILE SUMMARY (PIC18F010/020)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR,
BOR
Value on
All Other
RESETS
(Note 1)
FFEh
FFDh
FFCh
FFBh
FFAh
FF9h
FF8h
FF7h
FF6h
FF5h
FF4h
FF3h
FF2h
FF1h
FEFh
FEEh
FEDh
FECh
FEBh
FEAh
FE9h
FE8h
FE7h
FE6h
FE5h
FE4h
FE3h
FE2h
FE1h
FE0h
TOSH
TOSL
STKPTR
PCLATU
PCLATH
PCL
TBLPTRU
TBLPTRH
TBLPTRL
TABLAT
PRODH
PRODL
INTCON
INTCON2
INDF0
POSTINC0
POSTDEC0
PREINC0
PLUSW0
FSR0H
FSR0L
WREG
INDF1
POSTINC1
POSTDEC1
PREINC1
PLUSW1
FSR1H
FSR1L
BSR
Top-of-Stack High Byte (TOS<11:8>)
Top-of-Stack Low Byte (TOS<7:0>)
STKOVF STKUNF
—
Return Stack Pointer
—
—
bit21(3) Holding Register for PC<20:18>
—
—
—
—
—
—
Holding Register for PC<11:8>
PC Low Byte (PC<7:0>)
—
—
bit21(2) Program Memory Table Pointer
—
—
Upper Byte (TBLPTR<20:18>)
—
—
—
—
Program Memory Table Pointer High Byte
(TBLPTR<11:8>)
Program Memory Table Pointer Low Byte (TBLPTR<7:0>)
Program Memory Table Latch
Product Register High Byte
Product Register Low Byte
GIE/GIEH PEIE/GIEL
T0IE
INT0E
RBIE
T0IF
INT0F
RBIF
RBPU
INTEDG0
—
—
—
T0IP
—
RBIP
Uses contents of FSR0 to address data memory - value of FSR0 not changed (not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 post-incremented (not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 post-decremented (not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 pre-incremented (not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 pre-incremented (not a physical register) -
value of FSR0 offset by W
—
—
—
—
Indirect Data Memory Address Pointer 0 High
Indirect Data Memory Address Pointer 0 Low Byte
Working Register
Uses contents of FSR1 to address data memory - value of FSR1 not changed (not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 post-incremented (not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 post-decremented (not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 pre-incremented (not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 pre-incremented (not a physical register) -
value of FSR1 offset by W
—
—
—
—
Indirect Data Memory Address Pointer 1 High
Indirect Data Memory Address Pointer 1 Low Byte
—
—
—
—
Bank Select Register
FDFh INDF2
Uses contents of FSR2 to address data memory - value of FSR2 not changed (not a physical register)
FDEh POSTINC2 Uses contents of FSR2 to address data memory - value of FSR2 post-incremented (not a physical register)
FDDh POSTDEC2 Uses contents of FSR2 to address data memory - value of FSR2 post-decremented (not a physical register)
FDCh PREINC2 Uses contents of FSR2 to address data memory - value of FSR2 pre-incremented (not a physical register)
FDBh PLUSW2
Uses contents of FSR2 to address data memory - value of FSR2 pre-incremented (not a physical register) -
value of FSR2 offset by W
FDAh FSR2H
—
—
—
—
Indirect Data Memory Address Pointer 2 High
FD9h FSR2L
Indirect Data Memory Address Pointer 2 Low Byte
FD8h STATUS
—
—
—
N
OV
Z
DC
C
FD7h TMR0H
Timer0 Register High Byte
FD6h TMR0L
Timer0 Register Low Byte
FD5h T0CON
TMR0ON
T08BIT
T0CS
T0SE
T0PS3
T0PS2
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
T0PS1 T0PS0
Note 1: These registers can only be modified when the combination lock is open.
---- 0000
0000 0000
00-0 0000
--00 00--
---- 0000
0000 0000
---0 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 000x
11-- -1-1
N/A
N/A
N/A
N/A
N/A
---- 0000
xxxx xxxx
xxxx xxxx
N/A
N/A
N/A
N/A
N/A
---- 0000
xxxx xxxx
---- 0000
N/A
N/A
N/A
N/A
N/A
---- 0000
xxxx xxxx
---x xxxx
0000 0000
xxxx xxxx
1111 1111
---- 0000
0000 0000
00-0 0000
--00 00--
---- 0000
0000 0000
---0 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
0000 000u
11-- -1-1
N/A
N/A
N/A
N/A
N/A
---- 0000
uuuu uuuu
uuuu uuuu
N/A
N/A
N/A
N/A
N/A
---- 0000
uuuu uuuu
---- 0000
N/A
N/A
N/A
N/A
N/A
---- 0000
uuuu uuuu
---u uuuu
0000 0000
uuuu uuuu
1111 1111
2001 Microchip Technology Inc.
Preliminary
DS41142A-page 35