PIC18F24J10 View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC18F24J10' PDF : 368 Pages View PDF
PIC18F45J10 FAMILY
FIGURE 8-1:
PIC18F24J10/25J10/44J10/45J10 INTERRUPT LOGIC
PIR1<7:0>
PIE1<7:0>
IPR1<7:0>
PIR2<7:6, 3, 0>
PIE2<7:6, 3, 0>
IPR2<7:6, 3, 0>
PIR3<7:6>
PIE3<7:6>
IPR3<7:6>
High Priority Interrupt Generation
Low Priority Interrupt Generation
TMR0IF
TMR0IE
TMR0IP
RBIF
RBIE
RBIP
INT0IF
INT0IE
INT1IF
INT1IE
INT1IP
INT2IF
INT2IE
INT2IP
IPEN
IPEN
PEIE/GIEL
IPEN
Wake-up if in
Idle or Sleep modes
Interrupt to CPU
Vector to Location
0008h
GIE/GIEH
PIR1<7:0>
PIE1<7:0>
IPR1<7:0>
PIR2<7:6, 3, 0>
PIE2<7:6, 3, 0>
IPR2<7:6, 3, 0>
PIR3<7:6>
PIE3<7:6>
IPR3<7:6>
TMR0IF
TMR0IE
TMR0IP
RBIF
RBIE
RBIP
INT1IF
INT1IE
INT1IP
INT2IF
INT2IE
INT2IP
IPEN
Interrupt to CPU
Vector to Location
0018h
GIE/GIEH
PEIE/GIEL
DS39682C-page 80
Preliminary
© 2007 Microchip Technology Inc.
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