PIC18F010/020
FIGURE 4-1:
PIC18F010 MEMORY
PC<20:0>
21
Stack Level 1
•••
Stack Level 31
RESET Vector LSb
RESET Vector MSb
000000h
000001h
High Priority Interrupt Vector LSb 000008h
High Priority Interrupt Vector MSb 000009h
Low Priority Interrupt Vector LSb 000018h
Low Priority Interrupt Vector MSb 000019h
User FLASH
Read ‘0’s
0007FFh
000800h
000FFFh
001000h
Mirror
User ID Locations
1FFFFFh
200000h
200003h
FIGURE 4-2:
PIC18F020 MEMORY
PC<20:0>
21
Stack Level 1
•••
Stack Level 31
RESET Vector LSb
RESET Vector MSb
000000h
000001h
High Priority Interrupt Vector LSb 000008h
High Priority Interrupt Vector MSb 000009h
Low Priority Interrupt Vector LSb 000018h
Low Priority Interrupt Vector MSb 000019h
User FLASH
Program Memory
000FFFh
001000h
Mirror
User ID Locations
1FFFFFh
200000h
200003h
DS41142A-page 24
Preliminary
2001 Microchip Technology Inc.