ELAN 8X10
DATA SHEET
PMC-970109
ISSUE 3
PM3350 ELAN 8 X10
8 PORT ETHERNET SWITCH
Clocking
Parameter
Description
MIN TYP MAX Units
Fck
SYSCLK frequency1
1
50
50.5 MHz
Tch
SYSCLK High Pulse Width
8
nsec
Tcl
SYCLK Low Pulse Width
8
nsec
Fpck
PCICLK frequency2
0
40
40.5 MHz
Tpch
PCICLK High Pulse Width
11
nsec
Tpcl
PCICLK Low Pulse Width
11
nsec
Trst
RST* active time after PCICLK and SYSCLK 10
stable
usec
Notes:
1) The minimum clock frequency for SYSCLK is required to reliably refresh local
DRAM memory. The nominal frequency of 50 MHz must be provided for full
throughput.
2) The minimum clock frequency for PCICLK reflects completely static operation.
The nominal frequency of 40 MHz must be provided for full throughput.
Miscellaneous
Parameter
Tmisu
Tmih
Description
MINTR* setup to posedge SYSCLK
MINTR* hold to posedge SYSCLK
MIN MAX Units
10
nsec
0
nsec
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND PMC-SIERRA, INC. CUSTOMERS ONLY
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