PM5343STXC View Datasheet(PDF) - PMC-Sierra
Part Name
Description
MFG CO.
'PM5343STXC' PDF : 198 Pages View PDF
DATA SHEET
PMC-930303
ISSUE 6
PM5343 STXC
SONET/SDH TRANSPORT OVERHEAD TRANSCEIVER
Address 00H: Master Configuration
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
STEN
TMODE
FPOS
LLE
DLE
RXSEL
LTE
RMODE
Default
0
1
0
0
0
0
0
1
RMODE:
The RMODE bus selects the operating mode of the receive overhead
processor, as follows:
RMODE
0
1
MODE
STS-1
STS-3 (STM-1)
LTE:
The LTE bit selects the source of timing for the transmit section of the STXC.
Loop time operation can only be activated while the receive and transmit bit
serial interfaces are selected. When LTE is a logic zero, the transmitter timing
is derived from inputs TXCI+ and TXCI- or, optionally, from input TSICLK
when STS-1 mode is selected.
When LTE is a logic one, and the bit serial interface is selected (TSER and
RSER are both tied high), the transmitter timing is derived from the receiver
inputs RXCI+ and RXCI- or, optionally, from input RSICLK when STS-1 bit
serial mode is selected. Loop timed operation is not supported when the byte
serial interface is selected (Either TSER or RSER is tied low).
RXSEL:
The RXSEL bit only has effect when the RSER input is high and the RMODE
bit is a logic zero. If RXSEL is a logic zero in this situation, the 51.84 Mbit/s
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 47
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