PM6670S View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'PM6670S' PDF : 53 Pages View PDF
Device description
PM6670S
7.1.3
Pulse-skip and no-audible pulse-skip modes
High efficiency at light load conditions is achieved by PM6670S entering the pulse-skip
mode (if enabled). When one of the two fixed output voltages is set, pulse-skip power saving
is a default feature. At light load conditions the zero-crossing comparator truncates the low-
side switch on-time as soon as the inductor current becomes negative; in this way the
comparator determines the on-time duration instead of the output ripple (see Figure 33).
Figure 33. Inductor current and output voltage at light load with pulse-skip
Inductor
current
VDDQ
Output
Vreg
TON TOFF
t
TIDLE
As a consequence, the output capacitor is left floating and its discharge depends solely on
the current drained from the load. When the output ripple on the pin COMP falls under the
reference, a new shot is triggered and the next cycle begins. The pulse-skip mode is
naturally obtained enabling the zero-crossing comparator and automatically takes part in the
COT algorithm when the inductor current is about half the ripple current amount, i.e.
migrating from continuous conduction mode (C.C.M.) to discontinuous conduction mode
(D.C.M.).
The output current threshold related to the transition between PWM mode and pulse-skip
mode can be approximately calculated as:
Equation 20
ILOAD (PWM2Skip)
=
VIN − VOUT
2⋅L
⋅ TON
At higher loads, the inductor current never crosses zero and the device works in pure PWM
mode with a switching frequency around the nominal value.
A physiological consequence of pulse-skip mode is a more noisy and asynchronous (than
normal conditions) output, mainly due to very low load. If the pulse-skip is not compatible
with the application, the PM6670S, when set in adjustable mode-of-operation, allows the
user to choose between forced-PWM and no-audible pulse-skip alternative modes (see
Chapter 7.1.4 on page 30 for details).
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Doc ID 14432 Rev 4
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