RELEASED
DATA SHEET
PMC-2010333
ISSUE 3
PM7382 FREEDM-32P256
FRAME ENGINE AND DATA LINK MANAGER 32P256
Table 5 – Power and Ground Signals (65)
Pin Name Type
VDD3V3[1]
VDD3V3[2]
VDD3V3[3]
VDD3V3[4]
VDD3V3[5]
VDD3V3[6]
VDD3V3[7]
VDD3V3[8]
VDD3V3[9]
VDD3V3[10]
VDD3V3[11]
VDD3V3[12]
VDD3V3[13]
VDD3V3[14]
VDD2V5[1]
VDD2V5[2]
VDD2V5[3]
VDD2V5[4]
VDD2V5[5]
VDD2V5[6]
VDD2V5[7]
VDD2V5[8]
VDD2V5[9]
VDD2V5[10]
VDD2V5[11]
VDD2V5[12]
Power
Power
Pin
No.
D6
D10
D14
D18
H4
H20
M4
M20
T4
T20
Y6
Y10
Y14
Y18
E2
M1
W2
AB5
AC12
AB19
W22
M23
E22
B19
A12
B5
Function
The VDD3V3[14:1] DC power pins should be
connected to a well decoupled +3.3 V DC
supply. These power pins provide DC current
to the I/O pads.
The VDD2V5[12:1] DC power pins should be
connected to a well decoupled +2.5 V DC
supply. These power pins provide DC current
to the digital core.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 33