PSD813F1AV-12J View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
PSD813F1AV-12J
STMicroelectronics
'PSD813F1AV-12J' PDF : 110 Pages View PDF
PSD813F1V
Writing the OTP Row
Writing to the OTP row (64 bytes) can only be
done once per byte, and is enabled by an instruc-
tion. This instruction is composed of three specific
WRITE operations of data bytes at three specific
memory locations followed by the data to be
stored in the OTP row (refer to Table 8., page 20).
Figure 7. EEPROM SDP Enable Flowcharts
WRITE AAh to
Address 555h
During the WRITE operations, address bit A6 must
be zero, while address bits A5-A0 define the OTP
Row byte to be written while any EEPROM Sector
Select signal (EESi) is active. Writing the OTP
Row is allowed only when SDP mode is not en-
abled.
SDP SDP
Set not Set
WRITE AAh to
Address 555h
Page Write
Instruction
WRITE 55h to
Address AAAh
WRITE A0h to
Address 555h
Page Write
Instruction
SDP is set
SDP ENABLE ALGORITHM
WRITE 55h to
Address AAAh
WRITE A0h to
Address 555h
WRITE Data to
be Written in
any Address
WRITE
is enabled
Write
Write Data
in Memory
+
SDP Set
after tWC
(Write Cycle Time)
ai09219
25/110
Share Link: 