PSD813F1V
Data Toggle
Checking the Data Toggle bit on DQ6 is a method
of determining whether a Program or Erase in-
struction is in progress or has completed. Figure
10 shows the Data Toggle algorithm.
When the MCU issues a programming instruction,
the embedded algorithm within the PSD begins.
The MCU then reads the location of the byte to be
programmed in Flash to check status. Data bit
DQ6 of this location will toggle each time the MCU
reads this location until the embedded algorithm is
complete. The MCU continues to read this loca-
tion, checking DQ6 and monitoring the Error bit on
DQ5. When DQ6 stops toggling (two consecutive
reads yield the same value), and the Error bit on
DQ5 remains ‘0’, then the embedded algorithm is
complete. If the Error bit on DQ5 is ‘1’, the MCU
should test DQ6 again, since DQ6 may have
changed simultaneously with DQ5 (see Figure
10).
The Error bit at DQ5 will be set if either an internal
timeout occurred while the embedded algorithm
attempted to program the byte, or if the MCU at-
tempted to program a ‘1’ to a bit that was not
erased (not erased is logic ‘0’).
It is suggested (as with all Flash memories) to read
the location again after the embedded program-
ming algorithm has completed to compare the byte
that was written to Flash with the byte that was in-
tended to be written.
When using the Data Toggle method after an
erase instruction, Figure 10 still applies. DQ6 will
toggle until the erase operation is complete. A ‘1’
on DQ5 will indicate a timeout failure of the erase
operation, a ‘0’ indicates no error. The MCU can
read any location within the sector being erased to
get DQ6 and DQ5.
PSDsoft Express will generate ANSI C code func-
tions which implement these Data Toggling algo-
rithms.
Figure 10. Data Toggle Flowchart
START
READ
DQ5 & DQ6
DQ= 6
NO
TOGGLE
YES
NO DQ5
=1
YES
READ DQ6
DQ= 6
NO
TOGGLE
YES
FAIL
PASS
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