PSD813F1V-70JT View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
PSD813F1V-70JT
STMicroelectronics
'PSD813F1V-70JT' PDF : 110 Pages View PDF
PSD813F1V
Table 45. DC Characteristics (5V devices)
Symbol
Parameter
Test Condition (in addition
to those in Table 39)
Min.
Typ.
Max.
Unit
VIH
Input High Voltage
4.5V < VCC < 5.5V
2
VCC +0.5
V
VIL
Input Low Voltage
4.5V < VCC < 5.5V
–0.5
0.8
V
VIH1
Reset High Level Input Voltage
(Note 1)
0.8VCC
VCC +0.5
V
VIL1
Reset Low Level Input Voltage
(Note 1)
–0.5
0.2VCC –0.1 V
VHYS
Reset Pin Hysteresis
0.3
V
VLKO
VCC (min) for Flash Erase and
Program
2.5
4.2
V
VOL
Output Low Voltage
IOL = 20µA, VCC = 4.5V
IOL = 8mA, VCC = 4.5V
0.01
0.1
V
0.25
0.45
V
VOH
Output High Voltage Except
VSTBY On
IOH = –20µA, VCC = 4.5V
IOH = –2mA, VCC = 4.5V
4.4
4.49
2.4
3.9
V
V
VOH1
Output High Voltage VSTBY On
IOH1 = 1µA
VSTBY – 0.8
V
VSTBY SRAM Stand-by Voltage
2.0
VCC
V
ISTBY
SRAM Stand-by Current
VCC = 0V
0.5
1
µA
IIDLE
Idle Current (VSTBY input)
VCC > VSTBY
–0.1
0.1
µA
VDF
SRAM Data Retention Voltage
Only on VSTBY
2
V
ISB
Stand-by Supply Current
for Power-down Mode
CSI >VCC –0.3V (Notes 2,3)
50
200
µA
ILI
Input Leakage Current
VSS < VIN < VCC
–1
±0.1
1
µA
ILO
Output Leakage Current
0.45 < VOUT < VCC
–10
±5
10
µA
ICC (DC)
(Note 5)
Operating
Supply
Current
ZPLD Only
Flash memory
or EEPROM
ZPLD_TURBO = Off,
f = 0MHz (Note 5)
ZPLD_TURBO = On,
f = 0MHz
During Flash memory or
EEPROM WRITE/Erase
Only
Read only, f = 0MHz
0
mA
400
700
µA/PT
15
30
mA
0
0
mA
SRAM
f = 0MHz
0
0
mA
ZPLD AC Adder
ICC (AC) Flash memory or EEPROM AC
(Note 5) Adder
See Figure
36, note 4
2.5
3.5
mA/
MHz
SRAM AC Adder
1.5
3.0
mA/
MHz
Note: 1. Reset (RESET) has hysteresis. VIL1 is valid at or below 0.2VCC –0.1. VIH1 is valid at or above 0.8VCC.
2. CSI deselected or internal Power-down mode is active.
3. PLD is in non-Turbo mode, and none of the inputs are switching.
4. Please see Figure 36., page 73 for the PLD current calculation.
5. IOUT = 0mA
79/110
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