QL901M-6PS680C View Datasheet(PDF) - QuickLogic Corporation
Part Name
Description
MFG CO.
'QL901M-6PS680C' PDF : 37 Pages View PDF
Internal_AHB_Clock
CS_n
ADDR[31:0]
BLS_n[3:0]
OEN_n
WEN_n
DATA[31:0]
addr
byte lane select
D0
D1
write data
Figure 25: SRAM Write Waveforms
Table 22 and Table 23 below list the synchronous and asynchronous timing for the QuickMIPS Fabric
interface port. Note the following with regards to the fabric timing:
1 fb_int is asynchronous and is synchronized inside the core.
2 fb_bigendian is a static signal and reflects the value on the CPU_BIGENDIAN pin.
3 pm_* and si_* signals are synchronous to the internal MIPS clock which is twice the hclk frequency. Because this internal
clock is not brought to the outside, these signals are considered asynchronous.
4 All AF_PCI_* signals are static.
Table 22: QuickMIPS Interface Port Synchronous Timing (to hclk)
hresetn
Setup Time (Tsu)
xa
Hold Time (Thold)
x
Clock-to-out Time (Tco)
5.11
Fabric AHB Slave Ports
ahbs_hsel
X
X
10.73
ahbs_haddr
X
X
10.56
ahbs_htrans
X
X
11.35
ahbs_hwrite
X
X
8.32
ahbs_hsize
X
X
9.50
ahbs_hburst
X
X
9.12
ahbs_hprot
X
X
9.66
ahbs_hwdata
X
X
13.07
ahbs_hrdata
5.94
0
X
ahbs_hready_out
9.55
0
X
ahbs_hresp
10.39
0
X
Fabric AHB Master Ports
ahbm_haddr
11.94
0
X
ahbm_htrans
11.33
0
X
ahbm_hwrite
10.39
0
X
ahbm_hsize
10.58
0
X
(Sheet 1 of 2)
QL901M QuickMIPS™ Data Sheet Rev B
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