RC224ATL/224ATLV
EmbeddedModem Family
5.0 S Registers
Table 5-2. S Register Description (7 of 8)
Register
S27
Default
40h
Range
Bit Mapped
Units
—
Description
Bit Mapped Options.
Bit 3, 1, 0Communications Mode Option (See &D Command)
310
0 0 0 &Q0 selected—Asynchronous (factory
default)
0 0 1 &Q1 selected—Synchronous (not supported)
0 1 0 &Q2 selected—Synchronous (not supported)
0 1 1 &Q3 selected—Synchronous (not supported)
1 0 0 Reserved
1 0 1 Reserved
1 1 0 Reserved
1 1 1 Reserved
Bit 2 Dial Up/Leased Line Option
0
Dial Up (factory default)
1
Leased Line (not supported)
Bit 4, 5 Synchronous Transmit Clock Source Selection (See &X
Command)
54
0 0 &X0—Internal Clock (factory default)
0 1 &X1—External DTE Clock (not supported)
1 0 &X2—Receive Clock (not supported)
1 1 Reserved
Bit 6 Communications Standard Option (See B Command)
0
B0—CCITT V.22 bis/V.22
1
B1—Bell 212A (factory default)
Bit 7 Data/Fax Discrimination (i.e., AT+FAA Status)
0
Data/Fax auto answer mode disabled
(AT+FAA = 0)
1
Data/Fax auto answer mode enabled
(AT+FAA = 1)
D224ATLVDSC
Conexant
5-9