RC28F320C3TC70 View Datasheet(PDF) - Intel
Part Name
Description
MFG CO.
'RC28F320C3TC70' PDF : 68 Pages View PDF
Intel£ Advanced+ Boot Block Flash Memory (C3)
Table 16. Read Operations — 64 Mbit Density
Density
64 Mbit
# Sym
Parameter
Product
VCC
70 ns
80 ns
Unit
2.7 V–3.6 V 2.7 V–3.6 V
Note Min Max Min Max
R1 tAVAV Read Cycle Time
3,4
70
80
ns
R2 tAVQV Address to Output Delay
3,4
70
80 ns
R3 tELQV CE# to Output Delay
1,3,4
70
80 ns
R4 tGLQV OE# to Output Delay
1,3,4
20
20 ns
R5 tPHQV RP# to Output Delay
3,4
150
150 ns
R6 tELQX CE# to Output in Low Z
2,3,4
0
0
ns
R7 tGLQX OE# to Output in Low Z
2,3,4
0
0
ns
R8 tEHQZ CE# to Output in High Z
2,3,4
20
20 ns
R9 tGHQZ OE# to Output in High Z
2,3,4
20
20 ns
R10
tOH
Output Hold from Address, CE#, or OE#
Change, Whichever Occurs First
2,3,4
0
0
ns
NOTES:
1. OE# may be delayed up to tELQV–tGLQV after the falling edge of CE# without impact on tELQV.
2. Sampled, but not 100% tested.
3. See Figure 8, “Read Operation Waveform” on page 42.
4. See Figure 11, “AC Input/Output Reference Waveform” on page 49 for timing measurements and
maximum allowable input slew rate.
Figure 8. Read Operation Waveform
Address [A]
CE# [E]
OE# [G]
WE# [W]
Data [D/Q]
RST# [P]
R1
R2
R3
R4
R7
R6
R5
R8
R9
R10
42
Datasheet
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