S3C9454B/F9454B
CONTROL REGISTERS
T0CON — TIMER 0 Control Register
Bit Identifier
RESET Value
Read/Write
.7
.6
.5
0
0
–
R/W
R/W
–
.4
.3
.2
.1
–
0
–
0
–
R/W
–
R/W
.7–.6
.5–.4
Timer 0 Input Clock Selection Bits
0 0 fOSC/4096
0 1 fOSC/256
1 0 fOSC/8
1 1 fOSC/1
Not used for the S3C9454B/F9454B
.3
Timer 0 Counter Clear Bit
0 No effect
1 Clear the timer 0 counter (when write)
.2
Not used for the S3C9454B/F9454B
.1
Timer 0 Interrupt Enable Bit
0 Disable interrupt
1 Enable interrupt
.0
Timer 0 Interrupt Pending Bit (Capture or match interrupt)
0 No interrupt pending (when read)
0 Clear pending bit (when write)
1 Interrupt is pending (when read)
1 No effect (when write)
NOTES:
1. T0CON.3 is not auto-cleared. You must pay attention when clear pending bit. (refer to page 10-12)
2. To use T0 match output, you set T0CON.3 to "1". (refer to page 10-7)
F4H
.0
0
R/W
4-17