SC1404
POWER MANAGEMENT
Applications Information
Input Capacitor Selection and Out-of-phase Switching
The SC1404 uses out-of-phase switching between the two
converters to reduce input ripple current, allowing smaller cheaper
input capacitors compared to in-phase switching.
As the input voltage is reduced, the duty cycle of both converters
increases. At input voltages less than 8.3V, it is impossible to
prevent overlap regardless of the phase between the converters.
Overlap is seen in the following figure.
The figure below shows in-phase switching. I3in is the input current
for the 3V converter, I5in is the input current for the 5V converter.
The two converters start each switching cycle simultaneously,
causing a significant amount of overlap and a high peak current.
The total input current the third waveform, which shows how the
two currents add together. The fourth waveform is current in and
out of the input capacitors.
period
phase lead
D3
I5in
D5
Iin
average
D3
I3in
0
D5
I5in
0
Iin
average
Icap
0
0
Icap
The next figure shows out-of-phase switching. The 3V and 5V
pulses are spaced apart, so there is no overlap. This gives two
benefits; the peak current is reduced, and the effective switch
frequency is raised. Both of these make filtering easier. The third
waveform is the total input current, and the fourth waveform shows
the current flowing in and out of the input capacitors. The rms
value of the capacitor current is significantly lower than the in-
phase case, which allows for smaller capacitors.
From an input filter standpoint it is desirable to minimize the
overlap; but it is also desirable to keep the turn-on and turn-off
transitions of the two converters separated in time, to minimize
interaction between the two converters. The SC1404 keeps the
turn-on and turn-off transitions separated in time by changing the
phase between the converters depending on the input voltage.
The following table shows the phase relationship between 3V and
5V turn-on, based on input voltage.
Input
voltage
Phase lead from 3V to 5V
D3
I3in
Vin > 9.6 V
41% of switching period
No overlap between 3.3V and 5V
D5 I5in
Iin
Icap
average
0
0
9.6V > Vin
> 6.7V
6.7 > Vin
59% of switching period
Small overlap to prevent simultaneous
3V/5V switching
64% of switching period
Small overlap to prevent simultaneous
3V/5V switching
2004 Semtech Corp.
15
www.semtech.com