SC1404ITSTR View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SC1404ITSTR' PDF : 27 Pages View PDF
SC1404
POWER MANAGEMENT
Layout Guidelines
As with any high frequency switching regulator design, a good PCB
layout is essential to optimize performance of the converter. Be-
fore starting pcb layout, a careful layout strategy is strongly recom-
mended. See the pcb layout in the SC1404 Evaluation Kit manual
for example. In most applications, FR4 board material with 4 or
more layers and at least 2-ounce copper is recommended(for
output current up to 6A). Use at least one inner layer for ground
connection. It is good practice to tie signal ground and power ground
together at one single point so that the signal ground is not easily
contaminated. Also be sure that high current paths have low in-
ductance and resistance by making trace widths as wide as pos-
sible and lengths as short as possible. Use low-impedance by-
passing for lines that pull large amounts of current in short periods
of time. The following step by step layout strategy is recommended.
b. Current Sense.
Minimize the length of current sense signal traces. Keep them
less than 15mm. Kelvin connections should be used; try to keep
the traces parallel to each other and route them close to each
other as much as possible. Even though SC1404 implements
Virtual Current Sense scheme, the current sense signal is sampled
by the SC1404 to determine the PSAVE threshold. See the follow-
ing figure for a Kelvin connection of the current sense signal.
L1
Step #1. Power train components placement.
a. Power train arrangement.
Place power train components first. The figure below shows the
recommended power train arrangement. Q1 is the main switching
mosfet, Q2 is the low side mosfet, D1 is the Schottky diode and
L1 is the output inductor.
CSH
SC1404
CSL
Rcs
Q1
D1
L1
Q2
c. Gate Drive.
SC1404 has built-in gate drivers capable of sinking/sourcing 1A
peaks. Upper gate drive signals are noisier than the lower ones.
Therefore, place them away from sensitive analog circuitries. Make
sure the lower gate traces are as close as possible to the IC pins
and both upper and lower gate traces as wide as possible.
The phase node is generally the largest source of noise in the
converter circuit since it switches at very high rate of speed. The
phase node connections should be kept to a minimum size con-
sistent with its connectivity and current carrying requirements.
Place the Schottky diode as close to the phase node as possible
to minimize the trace inductance between it and the low side
mosfet, to reduce the efficiency loss due to the current ramp-up
and down time. This is important when the converter needs to
handle high di/dt requirements.
Step #2: PWM controller placement (pins) and signal ground is-
land.
Connect all analog grounds to a separate solid copper island
plane, which connects to the SC1404’s GND pin. This includes
REF, COMP3, COMP5, SYNC, ON3, ON5, PSV# and RESET#.
Step #3: Ground plane arrangement.
There are several ways to tie the different grounds together. Since
this is a buck topology converter, the output ground is relatively
quieter than the input ground. Therefore connect analog ground
to power ground at the output side. Often it is useful to use a
separate ground symbol for the two grounds, and tie the two
grounds together at a single point through a 0Ω resistor. The
power ground for the input side and the power ground for the
output side is the same ground and they can be tied together
using internal planes.
2004 Semtech Corp.
19
www.semtech.com
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