SC173AMLTRT View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
SC173AMLTRT
Semtech Corporation
'SC173AMLTRT' PDF : 26 Pages View PDF
SC173A
Applications Information (continued)
FB
PWM
-
REF +
SQ
R
VOUT
VIN On-Shot Timing
Generator
RTON
Time = K x VOUT/VIN
Hi-Side
and
Lo-Side
Gate
Drivers
VIN
LPF VOUT
Q1
L
VLX
Q2 ESR
FB
COUT +
Figure 2 — On-Time Generation
The SC173A uses an external resistor to set the on-time
which indirectly sets the frequency. The on-time can
be programmed to provide operating frequency from
200kHz to 1MHz using a resistor between the TON pin
and ground. The resistor value is selected by the fol-
lowing equation.
RTON
=
1
25pF ⋅ fSW
VOUT Voltage Selection
The switcher output voltage is regulated by comparing
VOUT as seen through a resistor divider at the FB pin to
the internal 750mV reference voltage, see Figure 3.
VOUT
R1
R2
To FB pin
Figure 3 — Output Voltage Selection
Note that this control method regulates the valley of the
output ripple voltage, not the DC value. The DC output
voltage VOUT is offset by the output ripple according to
the following equation.
VOUT
=
0.75V
⋅ 1+
R1
R2
+
VRIPPLE
2
© 2010 Semtech Corporation
Enable Input
The EN input is used to enable or disable the switching
regulator. When EN is low (grounded), the switching reg-
ulator is off and in its lowest power state. When off, the
output power switches are tri-stated.
When EN is pulled high (above 1V), or permitted to float,
the switching regulator turns on with automatic power
save enabled.
Smart Power Save Protection
Active loads may leak current from a higher voltage
into the switcher output. Under light load conditions
with power save enabled, this can force VOUT to slowly
rise and reach the over-voltage threshold, resulting in a
hard shutdown. Smart power save prevents this condi-
tion. When the FB voltage exceeds 10% above nominal
(exceeds 825mV), the device immediately disables powe
save, and DL drives high to turn on the low-side MOSFET.
This draws current from VOUT through the inductor and
causes VOUT to fall. When VFB drops back to the 750mV trip
point, a normal TON switching cycle begins. This method
prevents a hard OVP shutdown and also cycles energy
from VOUT back to VIN. Figure 4 shows typical waveforms
for the Smart Power Save feature.
VOUT drifts up to due to leakage
current flowing into COUT
Smart Power Save
Threshold (825mV)
FB
threshold
DH and DL off
VOUT discharges via inductor
and low-side MOSFET
Normal VOUT ripple
High-side
Drive (DH)
Single DH on-time pulse
after DL turn-off
Low-side
Drive (DL)
DL turns on when Smart
PSAVE threshold is reached
DL turns off when FB
threshold is reached
Normal DL pulse after DH
on-time pulse
Figure 4 — Smart Power Save
Current Limit Protection
The device features fixed current limiting, which is ac-
complished by using the RDS(ON) of the lower MOSFET for
current sensing. While the low-side MOSFET is on, the
12
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