SC2446ITETRT View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SC2446ITETRT' PDF : 38 Pages View PDF
SC2446
POWER MANAGEMENT
Application Information (Cont.)
12 20
∫ Pgd
=
1
Ts
Ts
v ce (t)igs (t)dt.
0
v ce(t) 10
00
0
0
5 .10 8
t
time (s)
1⋅10− 7
Figure 13 a). Approximated gate driver v (t) waveform.
ce
Similarly, the gate drive current is approximated as
igs
(t)
=
Igsp
(
t
T2
)2
−(
e
t
T2
)2
.
Where, Igsp is a scaling parameter proportional to the gate
drive peak current, T is a time constant proportional to
2
the fall time of v . For the example in Figure 13,
ce
Igsp=3.15A, T2=0.77Tf with Tf being measured as ~50 ns.
1.158 1.5
1
i gs(t)
0.5
00
0
0
5 .10 8
t
time (s)
1⋅10− 7
Figure 13 b). Approximated gate drive current i (t)
gs
waveform.
With these parameters, the approximated i (t) is plotted
gs
as in Figure 13 b).
Based on the approximation formulae of vce(t) and igs(t),
one can calculate the power losses for each gate driver
pair as
For SC2446, there are 4 gate drivers, the total gate driver
losses is then 4Pgd. For the example in Figure 12, the
power losses for each gate driver is estimated as 122
mW when the operating frequency is about 300kHz. The
total losses for the 4 gate drivers is then about 488
mW.
Remark 3: It is beneficial to select low gate charge
MOSFET’s for lower switching losses in the MOSFET
package and lower power dissipation in the gate-driving
IC. Once the MOSFET is chosen with a specified input gate
charge, one can adjust the gate driving resistor to balance
the driver IC losses and the power MOSFET switching losses.
To the first order of approximation, smaller gate resistance
leads to higher gate driving current and faster MOSFET
switching. But, the driver incurs more power losses. On
the other hand, larger gate drive resistance limits the gate
drive current, which leads to low Vce and less power losses.
But, the MOSFET suffers more switching losses.
Using low gate charge MOSFET’s reduces switching loss.
To prevent shoot-through between the top and the bottom
MOSFET’s during commutation, one MOSFET should be
completely turned off before the other is turned on. In the
SC2446 the top and the bottom gate drive pulses are
made non-overlapping. When not driving any load, the non-
overlapping commutation intervals from the top to the
bottom and from the bottom to the top gate drives are set
at 90ns. If MOSFET’s are driven from the SC2446, the
non-overlapping commutation times will decrease due to
finite gate-source voltage rise and fall times. The gate-
source voltage waveforms of the MOSFET’s should not
overlap above their respective thresholds when driven from
the SC2446. Use of low gate charge MOSFET’s reduces
transition times and the tendency of shoot-through. The
combined rise and fall times during both commutations
should be less than the preset non-overlapping intervals.
Current Sensing (Combi-Sense)
Inductor current sensing is required for the current-mode
control. Although the inductor current can be sensed with
a precision resistor in series with the inductor, a novel
lossless Combi-sense technique is used in the SC2446.
This SEMTECH proprietary technique has the advantages
of
2004 Semtech Corp.
18
www.semtech.com
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