SC2446ITETRT View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SC2446ITETRT' PDF : 38 Pages View PDF
SC2446
POWER MANAGEMENT
Application Information (Cont.)
Once either R or R is chosen, the other can be
o1
o2
calculated for the desired output voltage V . Since the
o
number of standard resistance values is limited, the
calculated resistance may not be available as a standard
value resistor. As a result, there will be a set error in the
converter output voltage. This non-random error is
caused by the feedback voltage divider ratio. It cannot
be corrected by the feedback loop.
The following table lists a few standard resistor
combinations for realizing some commonly used output
voltages.
complex high-Q poles of the output LC networks is split
into a dominant pole determined by the output capacitor
and the load resistance and a high frequency pole. This
pole-splitting property of current-mode control greatly
simplifies loop compensation.
The inner current-loop is unstable (sub-harmonic
oscillation) unless the inductor current up-slope is steeper
than the inductor current down-slope. For stable
operation above 50% duty-cycle, a compensation ramp
is added to the sensed-current. In the SC2446 the
compensation ramp is made duty-ratio dependent. The
compensation ramp is approximately
Vo (V)
0.6 0.9 1.2 1.5 1.8 2.5 3.3
Iramp = De1.76D * 30µA.
(1-h)/h
0.2 0.8 1.4 2 2.6 4
5.6
Ro1 (Ohm) 200 806 1.4K 2K 2.61K 4.02K 5.62K
The slope of the compensation ramp is then
Se = (1+ 1.76D)e1.76Dfs * 30µA.
Ro2 (Ohm) 1K 1K 1K 1K 1K 1K 1K
Only the voltages in boldface can be precisely set with
standard 1% resistors.
From this table, one may also observe that when the
value
1− h
h
=
Vo − 0.5
0.5
and its multiples fall into the standard resistor value
chart (1%, 5% or so), it is possible to use standard value
resistors to exactly set up the required output voltage
value.
The input bias current of the error amplifier also causes
an error in setting the output voltage. The maximum
inverting input bias currents of error amplifiers 1 and 2
is -250nA. Since the non-inverting input is biased to 0.5V,
the percentage error in the second output voltage will be
–100% · (0.25µA) · Ro1Ro2
this error below 0.2%, Ro2
</[04.k5Ω· .(Ro1+Ro2)
].
To
keep
The slope of the internal compensation ramp is well above
the minimal slope requirement for current loop stability
and is sufficient for all the applications.
With the inner current loop stable, the output voltage is
then regulated with the outer voltage feedback loop. A
simplified equivalent circuit model of the synchronous
Buck converter with current mode control is shown in
Figure 17.
k
Loop Compensation
SC2446 uses current-mode control for both step-down
channels. Current-mode control is a dual-loop control
system in which the inductor peak current is loosely
controlled by the inner current-loop. The higher gain outer
loop regulates the output voltage. Since the current loop
makes the inductor appear as a current source, the
Figure 17. A simple model of synchronous buck converter
with current mode control.
2004 Semtech Corp.
22
www.semtech.com
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