NXP Semiconductors
SC28L92
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter
A3 1
IP0 2
WRN 3
RDN 4
RxDB 5
TxDB 6
OP1 7
OP3 8
OP5 9
OP7 10
I/M 11
SC28L92A1B
(80xxx mode)
Fig 5. Pin configuration for QFP44; 80xxx mode
33 CEN
32 RESET
31 X2
30 X1/CLK
29 RxDA
28 TxDA
27 OP0
26 OP2
25 OP4
24 OP6
23 n.c.
002aad414
A3 1
IP0 2
R/WN 3
DACKN 4
RxDB 5
TxDB 6
OP1 7
OP3 8
OP5 9
OP7 10
I/M 11
SC28L92A1B
(68xxx mode)
Fig 6. Pin configuration for QFP44; 68xxx mode
33 CEN
32 RESETN
31 X2
30 X1/CLK
29 RxDA
28 TxDA
27 OP0
26 OP2
25 OP4
24 OP6
23 n.c.
002aad415
SC28L92_7
Product data sheet
Rev. 07 — 19 December 2007
© NXP B.V. 2007. All rights reserved.
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