SC401BEVB View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SC401BEVB' PDF : 32 Pages View PDF
SC401B
Applications Information (continued)
When the system is using ceramic output capacitors, the
ESR value is normally too small to meet the above ESR cri-
teria. As a result, the feedback voltage ripple is 180
degrees from the phase node and behaves in an unstable
manner. In this application it is necessary to add a small
virtual ESR network that is composed of two capacitors
and one resistor, as shown in Figure 13.
L
DCR
RL VL CL
CC
+- D x VIN
FB
pin
R1
COUT
R2
It is shown by the following equation.
VFBc L
Vc L
u
R1// R2 u S
R1// R2 u S u
u CC
CC
1
Figure 15 shows the magnitude of the ripple contribution
due to the output voltage ripple at the FB pin.
L DCR
RL VL
CC
CL
FB
pin
VOUT
VOUT
R1
CC
COUT
R2
FB
pin
R1
COUT
R2
Figure 13 — Virtual ESR Ramp Circuit
The ripple voltage at FB is a superposition of two voltage
sources: the voltage across CL and the output ripple
voltage. They are defined in the following equations.
VcL
IL u DCR(s u L / DCR 1)
S u RLCL 1
'VOUT
' IL
8C u fSW
Figure 14 shows the magnitude of the ripple contribution
due to CL at the FB pin.
Figure 15 — FB Voltage by Output Voltage
It is shown by the following equation.
VFB'VOUT
'VOUT
u
R2
R1
//
S
1
uC
C
R2
The purpose of this network is to couple the inductor
current ripple information into the feedback voltage such
that the feedback voltage has 90 degrees phase lag to the
switching node similar to the case of using standard high
ESR capacitors. This is illustrated in Figure 16.
FB contribution by
VOUT output voltage ripple
LX
L
D x VIN
+-
DCR
RL
VL
CL
CC
R1
FB
pin
R2
FB contribution
by CL
Combined FB
IL
Figure 14 — FB Voltage by CL Voltage
Figure 16 — FB voltage in Phasor Diagram
26
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