SC401BEVB View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SC401BEVB' PDF : 32 Pages View PDF
SC401B
Applications Information (continued)
AGND Island
• AGND should have its own island of copper with
no other signal traces routed on this layer that
connects the AGND pins and pad of the IC to the
analog control components.
• All of the components for the analog control cir-
cuitry should be located so that the connections
to AGND are done by wide copper traces or vias
down to AGND.
• Connect PGND to AGND with a short trace or 0Ω
resistor. This connection should be as close to
the IC as possible.
FB, VOUT, and Other Analog Control Signals
• The connection from the VOUT power to the
analog control circuitry must be routed from the
output capacitors and located on a quiet layer.
• The traces between Vout and the analog control
circuitry (VOUT, and FB pins) must be wide, short
and routed away from noise sources, such as
BST, LX, VIN, and PGND between the input
capacitors, output capacitors, and the IC.
• The feedback components for the switcher and
the LDO need to be as close to the FB and FBL
pins of the IC as possible to reduce the possibil-
ity of noise corrupting these analog signals.
BST, ILIM, TON, SS and LX
• The connections for the boost capacitor
between the BST and LXBST must be short, wide
and directly connected.
• ILIM and TON nodes must be as short as possible
to ensure the best accuracy in current limit and
on time.
• RILIM should be close to the IC and connected
between LXS (pin 28) and ILIM (pin 27) only.
• RTON should be close to the IC and connected
between TON (pin 31) and AGND (pin 30).
• CSOFT should be close to the IC and kept away
from the boost capacitor. Connect the AGND
• end of CSOFT to the AGND plane at pin 4.
The LX node between the IC and the inductor
should be wide enough to handle the inductor
current and short enough to eliminate the pos-
sibility of LX noise corrupting other signals.
• Multiple vias should be used on the LX PAD to
provide good thermals and connection to an
internal or bottom layer LX plane.
Capacitors and Current Loops
• Figure 17 shows the placement of input/output
capacitors and inductor. This placement shows
the smallest current loops between the input/
output capacitors, the SC401B and the inductor
to reduce the IR drop across the copper.
29
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