SC403MLTRT View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SC403MLTRT' PDF : 32 Pages View PDF
SC403
Applications Information (continued)
The design goal is that the output voltage regulation be
±4% under static conditions. The internal 750mV refer-
ence tolerance is ±1%. Allowing ±1% tolerance from the
FB resistor divider, this allows 2% tolerance due to VOUT
ripple. Since this 2% error comes from 1/2 of the ripple
voltage, the allowable ripple is 4%, or 60mV for a 1.5V
output.
The maximum ripple current of 3.7A creates a ripple
voltage across the ESR. The maximum ESR value allowed
is shown by the following equations.
ESRMAX
VRIPPLE
IRIPPLEMAX
ESRMAX = 16.2 mΩ
60mV
3.7A
The output capacitance is usually chosen to meet tran-
sient requirements. A worst-case load release, from
maximum load to no load at the exact moment when the
inductor current is at the peak, determines the required
capacitance. If the load release is instantaneous (load
changes from maximum to zero in < 1µs), the output
capacitor must absorb all the inductor’s stored energy.
This will cause a peak voltage on the capacitor requiring a
capacitance provided by the following equation.
COUTMIN
L¨©§IOUT
1
2
u IRIPPLEMAX
¸·
¹
2
2
2
VPEAK VOUT
Assuming a peak voltage VPEAK of 1.6V (100mV rise upon
load release), and a 6A load release, the required capaci-
tance is shown by the next equation.
COUTMIN
1.5PH¨§6A 1 u 3.7A ¸· 2
©2
¹
1.6V 2 1.5V 2
COUTMIN = 298µF
If the load release is relatively slow, the output capacitance
can be reduced. At heavy loads during normal switching,
when the FB pin is above the 750mV reference, the DL
output is high and the low-side MOSFET is on. During this
time, the voltage across the inductor is approximately
-VOUT. This causes a down-slope or falling di/dt in the
inductor. If the load di/dt is not much faster than the
-di/dt in the inductor, then the inductor current will tend
to track the falling load current. This will reduce the excess
inductive energy that must be absorbed by the output
capacitor, therefore a smaller capacitance can be used.
The following can be used to calculate the needed capaci-
tance for a given dILOAD/dt.
Peak inductor current is shown by the next equation.
ILPK = IMAX + 1/2 x IRIPPLEMAX
ILPK = 6 + 1/2 x 3.7 = 7.9A
Rate of change of Load Current dlLOAD
dt
IMAX = maximum load release = 6A
COUT
Lu ILPK IMAX u dt
ILPK u
VOUT dlLOAD
2 VPK VOUT
Example
dlLOAD 2A
dt 1Ps
This would cause the output current to move from 6A to
0A in 3.0µs, giving the minimum output capacitance
requirement shown in the following equation.
COUT
1.5PHu 7.9 6 u1Ps
7.9A u
1.5 2
2 1.6V 1.5V
COUT = 194 µF
Note that COUT is much smaller in this example, 194µF
compared to 298µF based on a worst-case load release. To
meet the maximum design criteria of minimum 298µF
and maximum 16mΩ ESR, select one capacitor rated at
330µF and 9mΩ ESR.
It is recommended that an additional small capacitor be
placed in parallel with COUT in order to filter high frequency
switching noise.
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