SC453
POWER MANAGEMENT
Applications Information (Cont.)
Step 8: Calculate Input RMS Current
In order to calculate the worst-case input RMS current, we
need to assume the efficiency at VIN_MIN and full load. From
the measurement result, we are safe to assume 80%,
(this number is very conservative, actual efficiency should
be much higher). The actual converter efficiency depends
on component selection, layout, airflow, etc.
POUT := IMAX_FL⋅VMAX_FL POUT = 23.64 W
POUT
PIN := 85%
PIN
IIN_DC := VINMIN
VMAX_FL
D :=
VINMIN
IIN_DC = 3.476 A
dVin := 250mV
DMAX := 0.5
1
Tin := FS
CIN_MIN
:=
IPEAK
2
⋅⎛⎝ DMAX
−
DMAX2 ⎞ ⋅
Tin
dVin
CIN_MIN
=
3.341
×
−
10
5
F
CIN := 10μF
⎛ CIN_MIN ⎞
NIN_MIN_RIPPLE := ceil⎜
⎝
CIN
⎠
NIN_MIN_RIPPLE = 4
( ) IRMS := ⎡⎣ IMAX_FL − IIN_DC⎤2⋅D + ⎡⎣IIN_DC2⋅(1 − D)⎤
Based on the above calculations, we choose N = 4 for the
input capacitor.
IRMS = 7.116 A
CI_RMS := 2A
10μF@25V, MLCC cap from Panasonic is rated 2A RMS.
⎛ IRMS ⎞
CI_NUM
:=
ceil⎜
⎝
CI_RMS
⎠
CI_NUM = 4
The calculation indicates four of these MLCC caps satisfy
the worst-case RMS current requirement.
Input Capacitance Calculation:
(based on ripple voltage)
dVin is the allowable input ripple voltage contributed by
the amount of input capacitance. For this exercise, we
use 250mV as the allowable input ripple voltage. The
maximum value occurs at D = 0.5
Step 9: OVP
No calculations are necessary for Over-Voltage Protection.
If VCORE is greater than +14% of the DAC (i.e., out of the
power good window), the SC453 will latch off and hold the
low-side driver on permanently (for each phase). Either
the power or EN must be recycled to clear the latch. The
latch is disabled during soft-start and VID/DeeperSleep
transitions. The latch is enabled if VCORE exceeds 2V even
during VID/DeeperSleep transitions to ensure that the
processor maximum is not exceeded. The table on Page
13 is a summary of fault conditions using SC453.
Step 10: Soft-Start/DAC Slew Control
The soft-start cap C21 in the SC453 design serves three
conditions: 1) to define the soft-start ramp; 2) to define
the DAC slew rate during sleep and VID transitions (dur-
ing VID transitions the SS current is nominally +/- 120μA.
During sleep transitions the SS current increases to +/-
240μA); 3) during start-up, the SS current is normally +/-
6.5μA.
We will be doing three soft-start exercises based on the
above three conditions for SC453 application:
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20
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