SC461
Applications Information (continued)
Note that the LDO enable pin (ENL) can also disable the
switching regulator through the VIN UVLO function. Refer
to the ENL Pin and VIN UVLO section.
Current Limit Protection
The SC461 features programmable current limiting, which
is accomplished using the RDS(ON) of the lower MOSFET for
current sensing. The current limit is set by RLIM resistor
which connects from the ILIM pin to the drain of the low-
side MOSFET. When the low-side MOSFET is on, an internal
10μA current flows from the ILIM pin and through the RLIM
resistor, creating a voltage drop across the resistor. While
the low-side MOSFET is on, the inductor current flows
through it and creates a voltage across the RDS(ON). The
voltage across the MOSFET is negative with respect to
PGND. If this MOSFET voltage drop exceeds the voltage
across RLIM, the voltage at the ILIM pin will be negative and
current limit will activate. The current limit then keeps the
low-side MOSFET on and prevents another high-side on-
time, until the current in the low-side MOSFET reduces
enough to bring the ILIM pin voltage up to zero. This
method regulates the inductor valley current at the level
shown by ILIM in Figure 8.
BST
DH
LX
ILIM
DL
PGND
VIN
Q1
CBST
RLIM
Q2
+
CIN
L
VOUT
D2
COUT
+
Figure 9 ā Valley Current Limit
Setting the valley current limit to 10A results in a peak
inductor current of 10A plus peak ripple current. In this
situation the average current through the inductor is 10A
plus one-half the peak-to-peak ripple current.
The RLIM value is calculated by the next equation.
5/,0
5'621 u ,/,0
Č$
IPEAK
ILOAD
ILIM
Time
Figure 8 ā Valley Current Limit
The current limit schematic with the RLIM resistor is shown
in Figure 9.
The internal 10μA current source is temperature compen-
sated at 2800 ppm in order to provide tracking with the
RDSON.
Soft-Start of PWM Regulator
The SC461 has a programmable soft-start time that is con-
trolled by an external capacitor at the SS pin. During the
soft-start time, the controller sources 3μA from the SS pin
to charge the capacitor. During the start-up process
(Figure 10), 40% of the voltage ramp at the SS pin is used
as the reference for the FB comparator. The PWM compara-
tor issues an on-time pulse when the FB voltage is less
than 40% of the SS voltage, which forces the output
voltage to follow the SS ramp. The output voltage reaches
regulation when the SS pin voltage exceeds 1.5V and the
FB reaches the 600mV threshold. The time between the
first LX pulse and VOUT reaching the regulation point is
the soft-start time (tSS). The calculation for the soft-start
time is shown by the following equation.
17