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SC4624MLTRT View Datasheet(PDF) - Semtech Corporation

Part Name
Description
MFG CO.
'SC4624MLTRT' PDF : 20 Pages View PDF
SC4624
POWER MANAGEMENT
OAppelriactaiotinon Information (Cont.)
where
The design guidelines for the SC4624 applications are as
follows:
ωI
=
R7
1
(C1
+ C2 )
ωZ1
=
1
R1 C2
ωZ2
=
(R 7
1
+ R8 ) C8
1.
Set
the
loop
gain
crossover
corner
frequency
w
C
for
given
switching
corner
frequency
w
S
=
2pfs,
2. Place an integrator at the origin to increase DC and
low frequency gains.
3.
Select
w
Z1
and
w
Z2
such
that
they
are
placed
near
w
O
to damp the peaking and the loop gain has a -20dB/
dec rate to go across the 0dB line for obtaining a wide
bandwidth.
4. Cancel the zero from C4’s ESR by a compensator pole
ωP1
=
C1 + C2
R1 C1 C2
wP1 (wP1 = wESR = 1/(RCC4)).
5.
Place
a
high
frequency
compensator
pole
w
P2
(wP2
=
pfs) to get the maximum attenuation of the switch-
ωP2
=
1
R8 C9
8
ing ripple and high frequency noise with the adequate
phase lag at wC.
The compensated loop gain will be as given as show in
After the compensation, the converter will have the
Figure 18.
following loop gain:
T(s) = GPWM GCOMP (s) GVD(s) =
1
VM
⋅ wI VI
s
1+ s
1+
wZ1
s
(s) GVD(s=) =
1
VM
⋅ wI VI
s
1+
1+
s
wZ1
s
wP1
1+ s
wZ2
1+ s
wP2
1+
s
1
wP1
RC C4
1+
s
L1
R
+
s2L1C
1+ s
1
+
wZ2
s
wP2
1+
s
1
1
+
s
RC C4
L1
R
+
s2L1C
where
GPWM = PWM gain.
VM = 1.0V, ramp peak to valley voltage of SC4624.
Figure 18. Asymptotic Diagrams
of Power Stage and Loop Gain
2008 Semtech Corp.
15
www.semtech.com
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